اعانه 15 سپتمبر 2024 – 1 اکتبر2024 د پیسو د راټولولو په اړه
1
Synthesis of Finite State Machines: Logic Optimization

Synthesis of Finite State Machines: Logic Optimization

Tiziano Villa, Timothy Kam, Robert K. Brayton, Alberto Sangiovanni-Vincentelli (auth.)
کال:
1997
ژبه:
english
فایل:
PDF, 9.74 MB
5.0 / 5.0
english, 1997
5
Synthesis of Finite State Machines: Functional Optimization

Synthesis of Finite State Machines: Functional Optimization

Timothy Kam, Tiziano Villa, Robert Brayton, Alberto Sangiovanni-Vincentelli (auth.)
کال:
1997
ژبه:
english
فایل:
PDF, 7.24 MB
5.0 / 5.0
english, 1997
6
Logic Synthesis for Field-Programmable Gate Arrays

Logic Synthesis for Field-Programmable Gate Arrays

Rajeev Murgai, Robert K. Brayton, Alberto Sangiovanni-Vincentelli (auth.)
کال:
1995
ژبه:
english
فایل:
PDF, 9.29 MB
0 / 0
english, 1995
7
Logic Minimization Algorithms for VLSI Synthesis

Logic Minimization Algorithms for VLSI Synthesis

Robert K. Brayton, Gary D. Hachtel, Curtis T. McMullen, Alberto L. Sangiovanni-Vincentelli (auth.)
کال:
1984
ژبه:
english
فایل:
PDF, 6.32 MB
0 / 0
english, 1984
8
Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design

Fan Mo, Robert K. Brayton
کال:
2004
ژبه:
english
فایل:
PDF, 13.66 MB
0 / 0
english, 2004
9
Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Sunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli (auth.)
کال:
2001
ژبه:
english
فایل:
PDF, 3.23 MB
0 / 0
english, 2001
10
Regular fabrics in deep sub-micron integrated-circuit design

Regular fabrics in deep sub-micron integrated-circuit design

Fan Mo, Robert King Brayton
کال:
2004
ژبه:
english
فایل:
PDF, 18.53 MB
0 / 0
english, 2004
11
Logic Synthesis and Optimization

Logic Synthesis and Optimization

Robert K. Brayton, Patrick C. McGeer (auth.), Tsutomu Sasao (eds.)
کال:
1993
ژبه:
english
فایل:
PDF, 21.13 MB
0 / 0
english, 1993
14
Timed Boolean Functions: A Unified Formalism for Exact Timing Analysis

Timed Boolean Functions: A Unified Formalism for Exact Timing Analysis

William K. C. Lam, Robert K. Brayton (auth.)
کال:
1994
ژبه:
english
فایل:
PDF, 6.69 MB
0 / 0
english, 1994
15
Logic minimization algorithms for VLSI synthesis

Logic minimization algorithms for VLSI synthesis

Robert King Brayton, et al
کال:
1984
ژبه:
english
فایل:
PDF, 10.68 MB
0 / 0
english, 1984